Automatizovana optimizacija digitalne logike pri projektovanju VLSI sistema

Title

Automatizovana optimizacija digitalne logike pri projektovanju VLSI sistema

Identifier

/unibl/sci/idNaucniRad:5073

Type

See all items with this valueConference Paper
See all items with this valuetext

Date

See all items with this value2015

Bibliographic Citation

Z. Bundalo, Automatizovana optimizacija digitalne logike pri projektovanju VLSI sistema, Zbornik radova 22. simpozijuma SYMOPIS95, Donji Milanovac, Srbija, pp. 156 - 159, 2015

page start

156

page end

159

presented at

Simpozijum SYMOPIS

Is Part Of

See all items with this valueZbornik radova 22. simpozijuma SYMOPIS95, Donji Milanovac, Srbija

Relation

See all items with this valueElektrotehnički fakultet

list of authors

See all items with this valueZlatko Bundalo

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