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"Branko Dokić"
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CMOS to BiCMOS Logic Gate Converter (1990)
B. Dokić, CMOS to BiCMOS Logic Gate Converter, 1990 -
Three – state BiCMOS Buffers with Positive Feedback (1995)
B. Dokić, G. Ninković, Three – state BiCMOS Buffers with Positive Feedback, 1995 -
Substrate current reduction for BiCMOS drivers (1999)
B. Dokić, Z. Cumbo, Substrate current reduction for BiCMOS drivers, 1999 -
HF Bipolar Integrated Circuits (1999)
N. Banović, B. Dokić, HF Bipolar Integrated Circuits, 1999 -
Reference Text Line Identification Using Gaussian Kernel Extended by Morphological Operations (2010)
D. Brodić, B. Dokić, Reference Text Line Identification Using Gaussian Kernel Extended by Morphological Operations, 2010 -
Text Line Segmentation by Gaussian Kernel Extended with Binary Morphology (2010)
D. Brodić, B. Dokić, Text Line Segmentation by Gaussian Kernel Extended with Binary Morphology, 2010 -
Initial Skew Rate Detection Using Rectangular Hull Gravity Center (2010)
D. Brodić, B. Dokić, Initial Skew Rate Detection Using Rectangular Hull Gravity Center, 2010 -
Identification of the Initial Skew Rate for Printed Text (2010)
D. Brodić, B. Dokić, Identification of the Initial Skew Rate for Printed Text, 2010 -
Comparison Between Initial Skew Rate and Moment Based Method for the Printed Text Skew Estimation (2012)
D. Brodić, D.R. Milivojević, B. Dokić, V. Tasić, Comparison Between Initial Skew Rate and Moment Based Method for the Printed Text Skew Estimation, 2012 -
Subthreshold Operated CMOS Analytic Model (2012)
B. Dokić, A. Pajkanović, Subthreshold Operated CMOS Analytic Model, 2012 -
Adiabatic Digital Circuits Based on Sub-threshold Operation of Pass-transistor and Slowly Ramping Signals (2012)
A. Pajkanović, A. Kazmierski, T. J., B. Dokić, Adiabatic Digital Circuits Based on Sub-threshold Operation of Pass-transistor and Slowly Ramping Signals, 2012 -
Minimum energy point of sub-threshold operated pass-transistor circuits (2012-09)
A. Pajkanović, B. Dokic, T. Kazmierski, Minimum energy point of sub-threshold operated pass-transistor circuits, Proceedings of FDL 2012, Sep, 2012 -
Low Power CMOS Sub-threshold Circuits (2013)
B. Dokić, A. Pajkanović, Low Power CMOS Sub-threshold Circuits, 2013 -
TRI REŽIMA DIGITALNE CMOS LOGIKE (2013)
B. Dokić, TRI REŽIMA DIGITALNE CMOS LOGIKE, 2013 -
SABIRAČI SA REDNIM PRENOSOM U TRI CMOS RADNA REŽIMA (2013)
B. Dokić, M. Sandić, SABIRAČI SA REDNIM PRENOSOM U TRI CMOS RADNA REŽIMA, 2013 -
CMOS sabirači u režimima jake i slabe inverzije (2013)
B. Dokić, M. Sandić, CMOS sabirači u režimima jake i slabe inverzije, 2013 -
Energetski efikasna CMOS digitalna logika (2013)
B. Dokić, Energetski efikasna CMOS digitalna logika, 2013 -
FPGA Implementation of AES Algorithm (2014)
A. Krkljić, B. Dokić, V. Škobić, FPGA Implementation of AES Algorithm, 2014 -
50 Years of Electronics in Banja Luka – Plenary paper (2014)
B. Dokić, 50 Years of Electronics in Banja Luka – Plenary paper, 2014 -
Energetski efikasni CMOS digitalni množači (2014)
B. Dokić, V. Škobić, A. Pajkanović, Energetski efikasni CMOS digitalni množači, 2014