An Empirical Methodology for Power Analysis of CMOS Integrated Circuits
Naslov
An Empirical Methodology for Power Analysis of CMOS Integrated Circuits
Identifikator
/unibl/sci/idNaucniRad:24298
Tip
Pronađite slične unoseAcademic Article
Datum
Bibliografski citat
V. Krunić, M. Krunić, I. Povazan, J. Kovacevic, An Empirical Methodology for Power Analysis of CMOS Integrated Circuits, ELEKTRONIKA IR ELEKTROTECHNIKA, pp. 46 - 53, 2019
Početna stranica
46
Krajnja stranica
53
Je dio
ELEKTRONIKA IR ELEKTROTECHNIKA
1392-1215
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